PCI agreement amplitude is the basal way that the Conventional PCI, PCI-X and PCI Express accomplish auto agreement of the cards amid into their bus.
Saturday 24 March 2012
Technical information
One of the above improvements the PCI Local Bus had over added I/O architectures was its agreement mechanism. In accession to the accustomed memory-mapped and I/O anchorage spaces, anniversary accessory on the bus has a agreement space. This is 256 bytes that are addressable by alive the 8-bit PCI bus, 5-bit device, and 3-bit action numbers for the accessory (commonly referred to as the BDF bus/device/function). This allows up to 256 buses, anniversary with up to 32 devices, anniversary acknowledging 8 functions. A individual PCI amplification agenda can acknowledge as a accessory and accept to apparatus at atomic action amount zero. The aboriginal 64 bytes of agreement amplitude are standardized; the butt are accessible for vendor-defined purposes.
In adjustment to acquiesce added locations of agreement amplitude to be connected after adverse with absolute uses, there can be a account of capabilities authentic aural the aboriginal 192 bytes of PCI agreement space. Anniversary adequacy has one byte that describes which adequacy it is, and one byte to point to the next capability. The amount of added bytes depends on the adequacy ID. If capabilities are getting used, a bit in the Status annals is set, and a arrow to the aboriginal in a affiliated account of capabilities is provided in the Cap. arrow annals authentic in the Connected Registers.
PCI-X 2.0 alien an continued agreement space, up to 4096 bytes. The alone connected allotment of continued agreement amplitude is the aboriginal 4 bytes at 0x100 which are the alpha of an continued adequacy list. Continued capabilities are actual abundant like accustomed capabilities except that they can accredit to any byte in the continued agreement amplitude (by application 12 $.25 instead of 8), accept a 4-bit adaptation amount and a 16-bit adequacy ID. Continued adequacy IDs overlap with accustomed adequacy IDs, but there is no adventitious of abashing as they are in abstracted lists.
In adjustment to acquiesce added locations of agreement amplitude to be connected after adverse with absolute uses, there can be a account of capabilities authentic aural the aboriginal 192 bytes of PCI agreement space. Anniversary adequacy has one byte that describes which adequacy it is, and one byte to point to the next capability. The amount of added bytes depends on the adequacy ID. If capabilities are getting used, a bit in the Status annals is set, and a arrow to the aboriginal in a affiliated account of capabilities is provided in the Cap. arrow annals authentic in the Connected Registers.
PCI-X 2.0 alien an continued agreement space, up to 4096 bytes. The alone connected allotment of continued agreement amplitude is the aboriginal 4 bytes at 0x100 which are the alpha of an continued adequacy list. Continued capabilities are actual abundant like accustomed capabilities except that they can accredit to any byte in the continued agreement amplitude (by application 12 $.25 instead of 8), accept a 4-bit adaptation amount and a 16-bit adequacy ID. Continued adequacy IDs overlap with accustomed adequacy IDs, but there is no adventitious of abashing as they are in abstracted lists.
Standardized registers
The Bell-ringer ID and Accessory ID registers analyze the device, and are frequently alleged the PCI ID. The 16-bit bell-ringer ID is allocated by the PCI-SIG. The 16-bit accessory ID is again assigned by the vendor. There is an advancing activity to aggregate all accepted Bell-ringer and Accessory IDs. (See alien links (below).)
The Subsystem Bell-ringer ID and the Subsystem Accessory ID added analyze the device. The Bell-ringer ID is that of the dent manufacturer, and the Subsystem Bell-ringer ID is that of the agenda manufacturer. The Subsystem Accessory ID is assigned by the subsystem vendor, but is assigned from the aforementioned amount amplitude as the Accessory ID.
The Status annals is acclimated to address which appearance are accurate and whether assertive kinds of absurdity accept occurred.
The Command annals contains a bitmask of appearance that can be alone enabled and disabled.
The Attack Type annals ethics actuate the altered layouts of actual 48 bytes (64-16) of the header, depending on the action of the device. That is, Type 1 headers for Root Complex, switches, and bridges. Again Type 0 for endpoints.
The Accumulation Band Admeasurement annals have to be programmed afore the accessory is told it can use the memory-write-and-invalidate transaction. This should commonly bout the CPU's accumulation band size, but the actual ambience is arrangement dependent. This annals does not administer to PCI Express.
The Subsystem Bell-ringer ID and the Subsystem Accessory ID added analyze the device. The Bell-ringer ID is that of the dent manufacturer, and the Subsystem Bell-ringer ID is that of the agenda manufacturer. The Subsystem Accessory ID is assigned by the subsystem vendor, but is assigned from the aforementioned amount amplitude as the Accessory ID.
The Status annals is acclimated to address which appearance are accurate and whether assertive kinds of absurdity accept occurred.
The Command annals contains a bitmask of appearance that can be alone enabled and disabled.
The Attack Type annals ethics actuate the altered layouts of actual 48 bytes (64-16) of the header, depending on the action of the device. That is, Type 1 headers for Root Complex, switches, and bridges. Again Type 0 for endpoints.
The Accumulation Band Admeasurement annals have to be programmed afore the accessory is told it can use the memory-write-and-invalidate transaction. This should commonly bout the CPU's accumulation band size, but the actual ambience is arrangement dependent. This annals does not administer to PCI Express.
Bus enumeration
In adjustment to abode a PCI accessory it accept to be mapped into the I/O anchorage abode amplitude or the memory-mapped abode amplitude of the system. The system's firmware/device drivers or the operating arrangement will affairs the Base Abode Registers (commonly alleged BARs) to acquaint the accessory of its abode mapping by autograph agreement commands to the PCI controller. Because all PCI accessories are in an abeyant accompaniment aloft arrangement reset, they will not accept any addresses assigned to them by which the operating arrangement or accessory drivers can acquaint with them. Either the BIOS or the operating arrangement geographically addresses the PCI slots (e.g. the aboriginal PCI slot, the additional PCI slot, or the third PCI slot, etc., on the motherboard) through the PCI ambassador application the per aperture IDSEL (Initialization Accessory Select) signals.
Since there is no absolute adjustment for the BIOS or OS to actuate which PCI slots accept accessories installed (nor the functions the accessory implements) the PCI bus(es) accept to be enumerated. Bus archive is performed by attempting to apprehend the Vendor- and Accessory ID annals for anniversary aggregate of bus amount and accessory number, at the device's action #0.
If there is no accessory that accouterments the action aught (i.e., bell-ringer and accessory ID registers), the bus adept performs an arrest and allotment all 1s in bifold (hexadecimal FFFFFFFF). All ones is an invalid VID/DID value, appropriately a accessory disciplinarian can acquaint that the defined aggregate bus/device/function (B/D/F) does not exist. So, if a apprehend to a action ID of aught for accustomed bus/device causes the adept (initiator) to abort, it accept to afresh be accepted that no alive accessory exists on that bus because accessories are appropriate to apparatus action amount zero. In this case, reads to the actual functions numbers (1–7) are not all-important as they aswell will not exist.
When a apprehend to a defined BDF aggregate bell-ringer ID annals succeeds, the BIOS or OS knows it exists, and can afresh affairs the anamnesis mapped and I/O anchorage addresses the action will acknowledge to into the devices' BAR agreement register. These addresses break accurate as continued as the arrangement charcoal angry on. On ability off, all these settings are absent and on the next arrangement boot, the agreement action is afresh all over again. Since this absolute action is absolutely automated, the computer user is absolved the assignment of configuring any anew added accouterments manually by modifying settings of DIP switches on the cards themselves. This is how bung and play is implemented.
If a PCI-to-PCI arch is found, the arrangement accept to accredit the accessory PCI bus above the arch a bus amount added than 0, and afresh enumerate the accessories on that accessory bus.
Each non-bridge PCI accessory can apparatus up to 6 BARs, anniversary of which can acknowledge to altered addresses in I/O anchorage and memory-mapped abode space. Anniversary BAR describes a arena 12:
Since there is no absolute adjustment for the BIOS or OS to actuate which PCI slots accept accessories installed (nor the functions the accessory implements) the PCI bus(es) accept to be enumerated. Bus archive is performed by attempting to apprehend the Vendor- and Accessory ID annals for anniversary aggregate of bus amount and accessory number, at the device's action #0.
If there is no accessory that accouterments the action aught (i.e., bell-ringer and accessory ID registers), the bus adept performs an arrest and allotment all 1s in bifold (hexadecimal FFFFFFFF). All ones is an invalid VID/DID value, appropriately a accessory disciplinarian can acquaint that the defined aggregate bus/device/function (B/D/F) does not exist. So, if a apprehend to a action ID of aught for accustomed bus/device causes the adept (initiator) to abort, it accept to afresh be accepted that no alive accessory exists on that bus because accessories are appropriate to apparatus action amount zero. In this case, reads to the actual functions numbers (1–7) are not all-important as they aswell will not exist.
When a apprehend to a defined BDF aggregate bell-ringer ID annals succeeds, the BIOS or OS knows it exists, and can afresh affairs the anamnesis mapped and I/O anchorage addresses the action will acknowledge to into the devices' BAR agreement register. These addresses break accurate as continued as the arrangement charcoal angry on. On ability off, all these settings are absent and on the next arrangement boot, the agreement action is afresh all over again. Since this absolute action is absolutely automated, the computer user is absolved the assignment of configuring any anew added accouterments manually by modifying settings of DIP switches on the cards themselves. This is how bung and play is implemented.
If a PCI-to-PCI arch is found, the arrangement accept to accredit the accessory PCI bus above the arch a bus amount added than 0, and afresh enumerate the accessories on that accessory bus.
Each non-bridge PCI accessory can apparatus up to 6 BARs, anniversary of which can acknowledge to altered addresses in I/O anchorage and memory-mapped abode space. Anniversary BAR describes a arena 12:
Hardware implementation
When assuming a agreement amplitude access, a PCI accessory does not break the abode to actuate if it should respond, but instead looks at the arresting IDSEL. There is a system-wide altered activation adjustment for anniversary IDSEL signal. The IDSEL is altered for anniversary PCI device/adapter slot. Further, the accessory is appropriate to break alone the everyman adjustment 11 $.25 of the abode amplitude (AD10 to AD0) address/data signals, and can avoid the top adjustment 21 A/D signals AD31 – AD11) completely.
Thus typically, an accomplishing has anniversary slot's IDSEL pin affiliated to a altered address/data band AD11 through AD31. To configure the agenda in aperture n, the PCI bus arch performs a configuration-space admission aeon with the PCI accessories annals to be addressed on curve AD7:2 (AD1:0 are consistently aught back registers are bifold words (32-bits)), and the PCI action amount authentic on $.25 AD10:8, with all higher-order $.25 zeros except for ADn+11 getting acclimated as the IDSEL arresting on a accustomed slot.
To abate electrical loading on the timing analytical (and appropriately loading sensitive) AD bus, usually the IDSEL arresting on the aperture adapter is affiliated to an ADn+11 through a resistor. This causes the IDSEL arresting to get to its alive action added boring than added PCI bus signals (due to the RC time connected of the resistor and the IDSEL pin's ascribe capacitance), so agreement amplitude accesses are performed added boring to acquiesce time for the IDSEL arresting to ability a accurate level.
The scanning on the bus is performed on the Intel belvedere by accessing two authentic connected ports. These ports are the Agreement Amplitude Abode (0xCF8) I/O anchorage and Agreement Amplitude Data (0xCFC) I/O port. The amount accounting to the Agreement Amplitude Abode I/O anchorage is created by accumulation D/B/F ethics and the registers abode amount into a 32-bit word.
Thus typically, an accomplishing has anniversary slot's IDSEL pin affiliated to a altered address/data band AD11 through AD31. To configure the agenda in aperture n, the PCI bus arch performs a configuration-space admission aeon with the PCI accessories annals to be addressed on curve AD7:2 (AD1:0 are consistently aught back registers are bifold words (32-bits)), and the PCI action amount authentic on $.25 AD10:8, with all higher-order $.25 zeros except for ADn+11 getting acclimated as the IDSEL arresting on a accustomed slot.
To abate electrical loading on the timing analytical (and appropriately loading sensitive) AD bus, usually the IDSEL arresting on the aperture adapter is affiliated to an ADn+11 through a resistor. This causes the IDSEL arresting to get to its alive action added boring than added PCI bus signals (due to the RC time connected of the resistor and the IDSEL pin's ascribe capacitance), so agreement amplitude accesses are performed added boring to acquiesce time for the IDSEL arresting to ability a accurate level.
The scanning on the bus is performed on the Intel belvedere by accessing two authentic connected ports. These ports are the Agreement Amplitude Abode (0xCF8) I/O anchorage and Agreement Amplitude Data (0xCFC) I/O port. The amount accounting to the Agreement Amplitude Abode I/O anchorage is created by accumulation D/B/F ethics and the registers abode amount into a 32-bit word.
Software implementation
Configuration reads and writes can be accomplished from the CPU in two ways: one bequest adjustment via I/O addresses 0xCF8 and 0xCFC, and addition alleged memory-mapped configuration.
The bequest adjustment was present in the aboriginal PCI, and it is alleged Agreement Access Mechanism (CAM). It allows for 256 bytes of a device's abode amplitude to be accomplished alongside via two registers alleged PCI CONFIG_ADDRESS and PCI CONFIG_DATA. These registers reside at addresses 0xCF8 and 0xCFC in the x86 I/O abode space. For example, a software disciplinarian (firmware, OS atom or atom driver) can use these registers to configure a PCI accessory by putting the abstracts that is declared to be accounting to the accessory into CONFIG_DATA, and by autograph the abode of the device's annals into CONFIG_ADDRESS. Since this action requires a abode to a annals in adjustment to abode the device’s register, it is referred to as "indirection."
The architecture of CONFIG_ADDRESS is the following:
bus << 16 | accessory << 11 | action << 8 | offset
As explained previously, acclamation a accessory via Bus, Device, and Action (BDF) is aswell referred to as "addressing a accessory geographically." See arch/i386/pci/early.c 3 in the Linux atom cipher for an archetype of cipher that uses bounded addressing.
The additional adjustment was created for PCI Express. It is alleged Enhanced Agreement Access Mechanism (ECAM). It extends device's agreement amplitude to 4k, with the basal 256 bytes overlapping the aboriginal (legacy) agreement amplitude in PCI. The area of the addressable amplitude is "stolen" so that the accesses from the CPU don't go to anamnesis but rather ability a accustomed accessory in the PCI Accurate fabric. During arrangement initialization, firmware determines the abject abode for this “stolen” abode arena and communicates it to the basis circuitous and to the operating system. This advice adjustment is implementation-specific, and not authentic in the PCI accurate
The bequest adjustment was present in the aboriginal PCI, and it is alleged Agreement Access Mechanism (CAM). It allows for 256 bytes of a device's abode amplitude to be accomplished alongside via two registers alleged PCI CONFIG_ADDRESS and PCI CONFIG_DATA. These registers reside at addresses 0xCF8 and 0xCFC in the x86 I/O abode space. For example, a software disciplinarian (firmware, OS atom or atom driver) can use these registers to configure a PCI accessory by putting the abstracts that is declared to be accounting to the accessory into CONFIG_DATA, and by autograph the abode of the device's annals into CONFIG_ADDRESS. Since this action requires a abode to a annals in adjustment to abode the device’s register, it is referred to as "indirection."
The architecture of CONFIG_ADDRESS is the following:
bus << 16 | accessory << 11 | action << 8 | offset
As explained previously, acclamation a accessory via Bus, Device, and Action (BDF) is aswell referred to as "addressing a accessory geographically." See arch/i386/pci/early.c 3 in the Linux atom cipher for an archetype of cipher that uses bounded addressing.
The additional adjustment was created for PCI Express. It is alleged Enhanced Agreement Access Mechanism (ECAM). It extends device's agreement amplitude to 4k, with the basal 256 bytes overlapping the aboriginal (legacy) agreement amplitude in PCI. The area of the addressable amplitude is "stolen" so that the accesses from the CPU don't go to anamnesis but rather ability a accustomed accessory in the PCI Accurate fabric. During arrangement initialization, firmware determines the abject abode for this “stolen” abode arena and communicates it to the basis circuitous and to the operating system. This advice adjustment is implementation-specific, and not authentic in the PCI accurate
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